Program Linear Load Address

follows Info Flags. This value is the executable's load address in linear memory. It corresponds to one of the linear memory block entries described later.

In flat models, the EIP value minus the program linear load address is the address offset of the faulting location relative to the start of the program.

Following Program Linear Load Address is a display of the next 128 byte values at the CS:EIP location when the exception occurred. These are the hexadecimal byte values of the CPU instructions at the time of the exception. 386 reference books or some debuggers can be used to reconstruct the instruction operation codes that correspond to these hexadecimal byte values.

The SS:ESP displays follows CS:EIP. This display shows the last 128 bytes values stored on the CPU stack.

SS:EBP is next. It shows 128 byte values of the current stack frame negatively and positively offset from the current EBP value. C and other high level language routines use the EBP register to reference parameters passed on the stack and this display can show which parameters were passed.

The resource tracking details come next. Selectors are listed with the following headings:

sel base limit type D mem count

Where:

Sel

Selector value.

base

Linear base address of selector.

limit

Limit of selector

type

CODE or DATA.

D

16 or 32 to signify segment D bit.

mem

Y or N to indicate if the selector has a memory block associated with it.

count

segment count in MAP file, xxxx if dynamically allocated.

The selector list is finished off with a display of the total number of selectors allocated to the program. For example:

Total selectors: 0107

Linear memory blocks are listed following the selector list, and contain

Next Page

Previous Page

Go to Table of Contents